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Âü°í¹®Çå
[1] B. Nitzberg and Virginia Lo., `Distributed Shared Memory: A Survey of Issues and Algorithms`, IEEE Computer, pp. 52-60, August 1991.

[2] Jelica Protić, Milo Tomašević, and Veljko Milutinović, `Distributed Shared Memory: Concepts and Systems`, IEEE Parallel & Distributed Technology, pp.63-79, Summer 1996.

[3] Jelica Protić, Milo Tomašević, and Veljko Milutinović, `A Survey of Distributed Shared Memory Systems`, Proc. 28th Ann. Hawaii Int`l Conf. System Sciences, IEEE Computer Society Press, Los Alamitos, Calif., pp. 74-84, 1995.

[4] Donglai Dai and Dhabaleswar K. Panda, `Reducing Cache Invalidation Overheads in Wormhole Routed DSMs Using Multidestination Message Passing`, Int`l Conf. Parallel Processing, pp.138-145, 1996.

[5] C. Holt, M. Heinrich, J. P. Singh, E. Rothberg and J. Hennessy, `The Effects of Latency, Occupancy, and Bandwidth in Distributed Shared Memory Multiprocessors`, Technical Report CSL-TR-95-660, Computer System Lab., Stanford University, 1995.

[6] John B. Carter, John K. Bennett and Willy Zwaenepoel, `Techniques for Reducing Consistency-Related Communication in Distributed Shared-Memory Systems`, ACM Trans. Computer Systems, Vol. 13, No. 3, pp. 205-243, August 1995.

[7] S. K. Reinhardt et al., `The Wisconsin Wind Tunnel: Vritual Prototyping of Parallel Computers`, SIGMETRICS, pp. 48-60, 1993.

[8] D. K. Panda, S. Singal and P.Prabhakaran, `Multidestination Message Passing Mechanism Conforming to Base Wormhole Routing Scheme`, Proc. Parallel Computer Routing and Communication Workshop, pp. 131-145, 1994.

[9] A. Gupta, W. D. Weber and T. Mowry, `Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes` Int`l Conf. Parallel Processing, pp. 312-321, August 1990.

[10] B. Nitzberg and Virginia Lo., `Distributed Shared Memory: A Survey of Issues and Algorithms`, IEEE Computer, pp. 52-60, August 1991.

[11] Michael Stumm and Songnian Zhou, `Algorithms Implementing Distributed Shared Memory`, IEEE Computer, Vol. 23, No. 5, pp. 54-64, May 1990.

[12] K. Gharachorloo, D. Lenoski, and et al., `Memory Consistency and Event Ordering in Scalable Shared-memory Multiprocessors`, 17th Int`l Symp. Computer Architecture, pp. 15-26, May 1990.

[13] S. K. Reinhardt et al., `The Wisconsin Wind Tunnel: Vritual Prototyping of Parallel Computers`, SIGMETRICS, pp. 48-60, 1993.


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