1.±×¸² 6.8ÀÇ 4bit even-parity generator/checker ½ÇÇèȸ·Î¸¦ °á¼±ÇÏ¿©¶ó. DO, 1, 2, 3ÀԷ¿¡ 1¡ëH(5V)¿Í 0¡ëL(0V)ÀÇ Á¶ÇÕÀ» Àΰ¡ÇÏ°í swith swÀÇ on/off »óÅ¿¡ µû¸¥ p¿Í y¸¦ ÃøÁ¤ÇÏ¿© ´ÙÀ½ Ç¥¸¦ ¿Ï¼ºÇÏ¿©¶ó.
2. ½ÇÇè¼ø¼ 1ÀÇ °á°ú¸¦ º¸°í parity generator/checkerÀÇ È¿°ú¸¦ ½á¶ó.
parity bit´Â Àü¼ÛÇÏ°íÀÚ ÇÏ´Â µ¥ÀÌÅÍÀÇ °¢ ¹®ÀÚ¿¡ 1ºñÆ®¸¦ ´õÇÏ¿© Àü¼ÛÇÑ´Ù.
even-parity bit: Àüü bit ¿¡¼ 1ÀÇ °³¼ö°¡ ¦¼ö°¡ µÇµµ·Ï parity bit¸¦ 1·Î Á¤ÇÑ´Ù.
odd-parity bit: Àüü bit¿¡¼ 1ÀÇ °³¼ö°¡ Ȧ¼ö°¡ µÇµµ·Ï parity bit¸¦ 0·Î Á¤ÇÑ´Ù.
parity bit¸¦ Á¤ÇÏ¿© µ¥ÀÌÅ͸¦ ¼Û½ÅÇÏ¸é ¼ö½Å Ãø¿¡¼´Â ¼ö½ÅµÈ µ¥ÀÌÅÍÀÇ Àüü bit¸¦ °è»êÇÏ¿© praity bit¸¦ ´Ù½Ã °è»êÇÒ ¼ö ÀÖÀ¸¹Ç·Î µ¥ÀÌÅÍ¿¡ ¿¡·¯¹ß»ý¿©ºÎ¸¦ ¾Ë ¼ö ÀÖ´Ù. ±×·¯³ª parity bit´Â ¿¡·¯¹ß»ý¿©ºÎ¸¸ ¾Ë ¼ö ÀÖ°í ¿¡·¯¸¦ ¼öÁ¤ÇÒ ¼ö´Â ¾ø´Ù.
3.±×¸² 6.7ÀÇ full-adder ȸ·Î¸¦ ÀÌ¿ëÇÏ¿© 4bit adder¸¦ °á¼±ÇÏ¿©¶ó. Á¦ÀÛµÈ 4bit adder¸¦ ÀÌ¿ëÇÏ¿© Y¡ëA+B °è»êÀ» ¼öÇàÇÏ¿©¶ó.
A+B¿¬»ê
1) A¡ë0001
B¡ë0xxx
CARRY¡ë0
2)A¡ë0xxx
B¡ëxxx¡¦(»ý·«)
3) A¡ë1111
4) A¡ë1111
4. 4bit adder¸¦ ÀÌ¿ëÇÏ¿© 2¡¯s complement(2ÀǺ¸¼ö)¹æ½Ä¿¡ ÀÇÇÑ 4bit-subtractor(»¬¼À±â)¸¦ ¼³°èÇÏ¿©¶ó.(hint: °¢ bit ´ç not gate Ãß°¡ ¶Ç´Â °¢ bit ex-or gate Ãß°¡)
5. Á¦ÀÛµÈ 4bit subtrator¸¦ ÀÌ¿ëÇÏ¿© Y¡ëA-B¸¦ ¼öÇàÇÏ¿©¶ó.
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